AxonOS is a bare-metal operating system designed to process neural signals (EEG/EMG) with zero-overhead latency, ensuring memory safety and deterministic execution for real-time AI inference.

• Kernel & Core OS: Rust (Strict adherence to memory safety, zero-cost abstractions, fearless concurrency).
• Hardware Interface (BCI Gateway): Rust, C (Low-level sensor integration).
• AI/ML Abstraction Layer: Python, C++ (Isolated execution for cognitive models).

graph TD;
    A[Neural Sensors / Hardware] -->|Raw Signal| B(BCI Gateway)
    B -->|Filtered Data| C{AxonOS Kernel - Rust}
    C -->|State| D[Cognitive Scheduler]
    D -->|Inference| E[AI Layer - Python/C++]

📂 Open Source Ecosystem axonos-sdk: Public Rust SDK for interacting with the AxonOS ecosystem. Contains public API traits, memory-safe data structures for telemetry parsing, and integration stubs.

A #![no_std] Rust microkernel for hard real-time brain-computer interface signal processing.

Motor imagery → deterministic intent → silicon-level execution. No GC. No jitter.

Most BCI software runs on Linux, RTOS, or Python stacks — general-purpose platforms with non-deterministic schedulers, garbage collectors, and millisecond-scale jitter. For a system that must close the neural feedback loop within a single 4 ms EEG sampling window, this is the wrong foundation.

AxonOS is a purpose-built bare-metal microkernel. It runs directly on STM32H573 (ARM Cortex-M33, 120 MHz), owns every clock cycle, and processes 8-channel EEG from DMA interrupt to signed IntentObservation packet in a verified worst-case of 618 µs — 6× inside the 4 ms sampling window, with 2.4 µs RMS jitter over 24-hour stress tests.

The output is not raw signal. It is a typed, cryptographically attested intent event that third-party applications receive through a WASM sandbox — with no path to the underlying neural data.

┌─────────────────────────────────────────────────────────────────┐
│  TrustZone Secure World  (STM32H573 SRAM1/2)                   │
│                                                                  │
│  ADC/DMA (250 Hz, 8ch, 16-bit)                                  │
│    └─► Artifact Gate (amplitude threshold → Kalman predict)     │
│    └─► Hanning window → CSP spatial filter (8ch → 2ch)         │
│    └─► RFFT 128pt × 2ch (CMSIS-DSP, FPU, ~312 µs)             │
│    └─► Band-power extraction (mu/beta 8–30 Hz)                  │
│    └─► MDM Riemannian classifier → posterior distribution       │
│    └─► Confidence gate (posterior > θ_user AND rejection check) │
│    └─► IntentObservation { intent_id, posterior_q16,            │
│                            timestamp_us, hmac_sha256 }          │
│                                  │                               │
│              NSC Gateway (only crossing point)                   │
│                                  │                               │
├──────────────────────────────────┼──────────────────────────────┤
│  Non-Secure World                ▼                              │
│                                                                  │
│  SPSC Ring Buffer (lock-free, wait-free)                        │
│    └─► WASM Application Sandbox                                  │
│          └─► Neural Permissions Firewall                         │
│                (capability manifest enforced at load time)       │
│                └─► Third-party application                       │
│                      receives: typed event + confidence          │
│                      cannot access: raw EEG, features, keys      │
└─────────────────────────────────────────────────────────────────┘

BLE 5.2 (nRF52840) — connection interval 7.5 ms, ATT notify

EDF task schedule (Cortex-M33 NVIC, verified feasible at 19% utilisation):

Full methodology: Article #12 — Benchmark Report

Kernel (RT pipeline) — #![no_std] Rust, bare metal:

• No heap allocation in the RT path — all buffers statically allocated
• No OS scheduler — EDF via NVIC priority assignment, WCET-verified
• No blocking calls — DMA-driven acquisition, interrupt-driven processing
• Memory safety enforced by Rust borrow checker + TrustZone SRAM partitioning

Signal processing:

• CMSIS-DSP (arm_rfft_fast_f32, arm_mat_mult_f32) via Rust FFI
• Common Spatial Patterns (CSP) spatial filter, pre-computed at calibration
• Riemannian MDM classifier — geodesic distance on SPD manifold
• Adaptive Kalman filter with online covariance estimation

Security:

• TrustZone-M: raw EEG physically isolated in Secure World SRAM
• HMAC-SHA256 attestation on every IntentObservation (~2 µs overhead)
• WASM linear memory isolation for application layer (Haas et al., 2017)
• Capability manifest: Ed25519-signed, kernel-enforced at load time

What is not in the kernel:

• Python — incompatible with #![no_std] bare-metal execution
• Dynamic allocation (malloc / Box / Vec in RT path)
• Linux, RTOS, or any general-purpose OS layer
• Cloud connectivity — local-first architecture, neural data never leaves device

Note on private repositories: The core kernel and DSP pipeline are maintained in private repositories during the pre-release phase. The axonos-sdk contains the public API surface: types, traits, and capability definitions that third-party developers build against. The private kernel implements the other side of that API.

Neural data in AxonOS follows one direction and one direction only:

Raw EEG (Secure World SRAM)
    │
    ▼  [never crosses this boundary as raw signal]
IntentObservation (typed, signed, confidence-bearing)
    │
    ▼
WASM Application Sandbox
    │
    ▼
Third-party application
    (receives: intent class + confidence + attestation tag)
    (cannot access: electrode voltages, band features, biometric identifiers)

Applications declare their capability scope in a signed manifest at install time. The kernel binds only the declared host functions to the WASM instance — an application cannot call a function for a capability it didn't declare because that function does not exist in its execution environment. Enforcement is structural, not policy-based.

Neural Permissions capability classes: NavigationIntents (85–95% accuracy), WorkloadAdvisory (~70%, binary), SessionQuality, ArtifactEvents.

Not available as capabilities: RawEEG (architectural boundary), EmotionState (60–70% accuracy, insufficient for consent), FlowState (not reliably detectable in real-time), CognitiveProfile (prohibited).

Full architecture: Articles #3, #7, #9, #10

30 articles covering the full architecture, from DMA buffers to neuroethics law:

• #1 Signal Supremacy — Why EEG jitter destroys phase coherence and how adaptive Kalman filtering handles it
• #4 Zero-Jitter Microkernel — EDF scheduling, SPSC ring buffers, WCET analysis
• #7 Privacy Protocol — TrustZone memory map, HMAC attestation, timing attack surface
• #10 E2E Intent Routing — Curve25519/AES-GCM, SPSC airgap, what orthogonal projection can and cannot guarantee
• #12 Benchmark Report — 618 µs WCET, 2.4 µs jitter, 20h battery life — measured on hardware
• #13 Riemannian Geometry — MDM classifier, Euclidean Alignment, session-to-session adaptation
• #29 Cognitive Hypervisor — Shannon-McCreery damage limits, stimulation safety architecture for bidirectional BCIs
• #30 Developer Ecosystem — Capability manifest, app signing pipeline, SDK onboarding

→ Full series at medium.com/@AxonOS

Current phase: MVP hardware validation + SDK alpha

• ✅ Bare-metal pipeline verified on STM32H573 (618 µs WCET, 0 overruns / 24h)
• ✅ TrustZone partition implemented and tested
• ✅ Riemannian MDM classifier: 85–95% accuracy, 2-class MI, 5 subjects
• ✅ axonos-sdk public API alpha
• 🔄 Euclidean Alignment transfer learning (session cold-start < 60 s)
• 🔄 Peripheral FES feedback path + Cognitive Hypervisor (stimulation safety)
• 🔄 axonos-cli + simulator public release
• ⬜ AxonOS App Directory + capability manifest registry
• ⬜ CE/FDA regulatory pathway (readout-only class I, bidirectional class III)

Founder: Denis Yermakou Jurisdiction: Singapore R&D: Remote-first

Contact:

• Engineering: admin@axonos.org
• Partnerships: axonos.org

AxonOS. Pure signal. Zero noise.

Note: The core kernel and proprietary ML modules are maintained in private repositories.

🏢 Organization Jurisdiction: Singapore

R&D Base: Bali, Indonesia

Contact: admin@axonos.org